The present invention relates to a semiconductor device and a semiconductor wafer, and to a technology effective in applying to, for example, a semiconductor device that is provided with a ring region in which a seal ring has been arranged outside a circuit region in which an integrated circuit has been formed and a semiconductor wafer.
Japanese Patent Laid-Open No. 2011-222939 (Patent Document 1) describes a semiconductor device in which a crack protection ring is provided in a region directly under a crack prevention window located outside a moisture-resistant ring. At this time, a top surface of the crack protection ring is configured so as to be exposed from a bottom surface of the crack prevention window.
Japanese Patent Laid-Open No. 2008-270720 (Patent Document 2) describes a semiconductor device in which a metal wire is provided in a region directly under an opening located outside a moisture-resistant shield ring.
Japanese Patent Laid-Open No. 2011-9795 (Patent Document 3) describes a semiconductor device in which a silicon nitride film peel-off prevention groove is provided outside a seal ring, being a moisture shielding wall, and in which an external seal ring is provided between the seal ring and the silicon nitride film peel-off prevention groove.